Intel 4004
Microprocessor

(The World's First Microprocessor)

                       
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How the 4004 Came About
Federico Faggin (Designer of the 4004 CPU)
History of the 4004 Development
World's First Microcomputer
Specification (Technical Information)
Pinouts
Instruction Set

4004 Micrograph
High Resolution Photograph of the 4004 CPU
Excerpts of MCS-40 Data Book

4004 Microprocessor Related Articles

How the 4004 Came About

"In 1971, Busicom, a Japanese company, wanted a chip for a new calculator. With incredible o verkill, Intel built the world's first general-purpose microprocessor. Then it bought back the rights for $60,000.

The 4-bit 4004 ran at 108 kHz and contained 2300 transistors. Its speed is estimated at 0.06 MIPS. By comparison, Intel's P6 , runs at 133 MHz, contains 5.5 million transistors, and executes 300 MIPS."

"Timely as it was at that time, "Busicom" company gave an order for semi-conductors. The time was 1969 and Busicom was planning to sell high-performance calculators for scientific calculations, etc and gave orders to the newly started Intel to produce 13 different types of semi-conductors. At the time Intel was still procrastinating whether they should go with this production or not. The reason for the procrastination was that Intel had previously only produced three types of product. Just then, Mr. Ted Hoff, who was an ex researcher from Stanford University, joined Intel. When he heard about the orders from Busicom he saw a chance to realise an idea he had had in his mind for some time. According to the instructions from Busicom, respective semi-conductor chips were supposed to be used for each function, computing, keyboard control, printer control respectively. Mr. Hoff's thinking was an integrated circuit (I.C.) which would accommodate multiple instructions on to a single chip.

Mr. Hoff completed his detailed design plan before a revisit by Busicom's executive a couple of months later. Although it was genuinely a first trial for Busicom on hearing Mr. Hoff's news Busicom agreed to his ideas. An agreement was reached to develop the products jointly. At the same time Busicom sent Mr. S Hato ( he is now Vice President of V.M.Technology ) to the Intel Company. This genuinely first agreement was the birth of the world's first CPU (MPU 4004, Micro Processor Unit)."

Appearing in IEEE Computer 1972:

NEW
PRODUCTS
FEATURE PRODUCT
COMPUTER ON A CHIP

Intel has introduced an integrated CPU complete with
a 4-bit parallel adder, sixteen 4-bit registers, an accumula-
tor and a push-down stack on one chip. It's one of a
family of four new ICs which comprise the MCS-4 micro
computer system--the first system to bring the power and
flexibility of a dedicated general-purpose computer at low
cost in as few as two dual in-line packages.
MSC-4 systems provide complete computing and con-
trol functions for test systems, data terminals, billing
machines, measuring systems, numeric control systems
and process control systems.
The heart of any MSC-4 system is a Type 4004 CPU,
which includes a set of 45 instructions. Adding one or
more Type 4001 ROMs for program storage and data
tables gives a fully functioning micro-programmed com-
puter. Add Type 4002 RAMs for read-write memory and
Type 4003 registers to expand the output ports.
Using no circuitry other than ICs from this family of
four, a system with 4096 8-bit bytes of ROM storage and
5120 bits of RAM storage can be created. For rapid
turn-around or only a few systems, Intel's erasable and
re-programmable ROM, Type 1701, may be substituted
for the Type 4001 mask-programmed ROM.
MCS-4 systems interface easily with switches, key-
boards, displays, teletypewriters, printers, readers, A-D
converters and other popular peripherals. For further
information, circle the reader service card 87 or call Intel
at (408) 246-7501.

Circle 87 on Reader Service Card

COMPUTER/JANUARY/FEBRUARY 1972/71

There was also an ad for the 4004 in Electronic News, Nov. 1971.

Appearing in IEEE Computer 1975:

The age of the affordable computer.

MITS announces the dawning of the Altair 8800
Computer. A lot of brain power at a price that's
bound to create love and understanding. To say
nothing of excitement.
The Altair 8800 uses a parallel, 8-bit processor
(the Intel 8080) with a 16-bit address. It has 78
basic machine instructions with variances over 200
instructions. It can directly address up to 65K bytes
of memory and it is fast. Very fast. The Altair
8800's basic instruction cycle time is 2 microseconds.
Combine this speed and power with Altair's
flexibility (it can directly address 256 input and 256
output devices) and you have a computer that's
competitive with most mini's on the market today.
The basic Altair 8800 Computer includes the
CPU, front panel control board, front panel lights
and switches, power supply (enough to power any
additional cards), and expander board (with room
for 3 extra cards) all enclosed in a handsome, alum-
inum case. Up to 16 cards can be added inside the
main case.
Options now available include 4K dynamic mem-
ory cards, 1K static memory cards, parallel I/O
cards, three serial I/O cards (TTL, R232, and TTY),
octal to binary computer terminal, 32 character
alpha-numeric display terminal, ASCII keyboard,
audio tape interface, 4 channel storage scope (for
testing), and expander cards.
Options under development include a floppy disc
system, CRT terminal, line printer, floating point
processor, vectored interrupt (8 levels), PROM
programmer, direct memory access controller and
much more.

PRICE
Altair 8800 Computer: $439.00* kit
$621.00* assembled

prices and specifications subject to change without notice


For more information or our free Altair Systems
Catalogue phone or write: MITS, 6328 Linn N.E.,
Albuquerque, N.M. 87108, 505/265-7553.

*In quantities of 1 (one). Substantial OEM discounts available.
[Picture of computer, with switches and lights]

Specification (Technical Information)

Pinouts:

Instruction Set:

+----------+--+--+-+-------------------------------------------+
|Mnemonic |W1|W2|T|Description |
+----------+--+--+-+-------------------------------------------+
|NOP |00| |E|No Operation |
|JCM c,aa |1c|aa|G|Jumps to ROM address aa depending on c |
|FIM Rm,dd |2s|dd|I|Fetch Immediate (Mov dd to reg pair s) |
|SRC Rm |2t| |C|Send Register Control (*1) |
|FIN Rm |3s| |B|Fetch Indirect(Mov ROM at @R0R1 to s) |
|JIN Rm |3t| |C|Jump Indirect (Jump to @t) |
|JUN aaa |4a|aa|F|Jump Unconditional to ROM address aaa |
|JMS aaa |5a|aa|F|Jump to Subroutine at ROM address aaa |
|INC Rn |6r| |A|Increment register r |
|ISZ Rn aa |7r|aa|H|Increment register r jump to aa on Zero |
|ADD Rn |8r| |A|Add register r to accumulator with carry |
|SUB Rn |9r| |A|Subtract r to accumulator with borrow |
|LD Rn |Ar| |A|Load accumulator with contents of r |
|XCH Rn |Br| |A|Exchange contents of r and accumulator |
|BBL d |Cd| |D|Branch back (in stack) load imm d to accum |
|LDM d |Dd| |D|Load imm to accumulator |
|WRM |E0| |E|Write contents of accumulator to RAM |
|WMP |E1| |E|Write contents of accum to RAM output port |
|WRR |E2| |E|Write contents of accum to ROM I/O lines |
|WPM |E3| |E|Write accum to selected half-byte (*2) |
|WR0 |E4| |E|Write selected RAM status character 0 (*1) |
|WR1 |E5| |E|Write RAM status char1 to accum (*1) |
|WR2 |E6| |E|Write RAM status char2 to accum (*1) |
|WR3 |E7| |E|Write RAM status char3 to accum (*1) |
|SBM |E8| |E|Subtract selected RAM from accum (*1) |
|RDM |E9| |E|mov selected RAM to the accum (*1) |
|RDR |EA| |E|mov contents of ROM I/O lines to accum(*1) |
|ADM |EB| |E|Add selected RAM to accum with carry (*1) |
|AD0 |EC| |E|Read selected RAM status character 0 (*1) |
|AD1 |ED| |E|Read RAM status char1 from accum (*1) |
|AD2 |EE| |E|Read RAM status char2 from accum (*1) |
|AD3 |EF| |E|Read RAM status char3 from accum (*1) |
|CLB |F0| |E|Clear Both (Accumulator and Carry) |
|CLC |F1| |E|Clear Carry |
|IAC |F2| |E|Increment Accumulator |
|CMC |F3| |E|Complement Carry |
|CMA |F4| |E|Complement Accumulator |
|RAL |F5| |E|Rotate Left Accumulator and Carry |
|RAR |F6| |E|Rotate Right Accumulator and Carry |
|TCC |F7| |E|Transfer Carry to Accumulator then Clear |
|DAC |F8| |E|Decrement Accumulator |
|TCS |F9| |E|Transfer Carry subtract then Clear |
|STC |FA| |E|Set Carry |
|DAA |FB| |E|Decimal Adjust Accumulator |
|KBP |FC| |E|Keyboard Proccess (*3) |
|DCL |FD| |E|Designate command line |
+----------+--+--+-+-------------------------------------------+

+--------------------------------------------------------------+
| Instruction Format |
+---------+------+----+----------------------------------------+
| Word1 |Word2 |Type| Notes |
+---------+------+----+----------------------------------------+
| ----rrrr |A |rrrr=R0/R1/.../RE/RF (4 bits) |
| ----rrr0 |B |rrr=R0R1/.../RERF (3 bits) |
| ----rrr1 |C |rrr=even numbered Reg Pairs (see above) |
| ----dddd |D |dddd=4 bits of immediate data |
| -------- |E | |
| ----xxxx XX |F |aaaa=upper 4 bit address XX=Lower 8 addr|
| ----cccc XX |G |cccc=condition reg. XX=Lower 8 bit addr |
| ----rrrr XX |H |rrrr=R0/R1/.../RE/RF XX=Lower 8 bit addr|
| ----rrr0 DD |I |DD=Data |
+----------------+----+----------------------------------------+

+------------------+-------------------------------------------+
|Hex Variable |Description |
+------------------+-------------------------------------------+
|r |R0/R1/R2/R3/.../RD/RE/RF |
|s |Reg Pairs R0R1/.../RERF followed by bin 0 |
|t |Reg Pairs R0R1/.../RERF followed by bin 1 |
|a |Upper Address A11,A10,A9,A8 |
|aa |Middle and Lower Address A7,A6,..,A1,A0 |
|d |Four bits of immediate data |
|dd |Eight bits of immediate data |
|c |condition reg. c1c2c3c4 (*4) |
+------------------+-------------------------------------------+

+------------------+-------------------------------------------+
|Mnemonic Variable |Description |
+------------------+-------------------------------------------+
|Rn |R0/R1/R2/R3/.../RD/RE/RF (4 bits) |
|Rm |Reg pairs R0R1/R2R3/R4R5/.../RERF (3 bits) |
|dd |8 bits of immediate data |
|d |4 bits of immediate data |
|aa |8 bit address |
|aaa |12 bit address |
|c |condition reg. c1c2c3c4 (4)
+------------------+-------------------------------------------+

(*1) SRC selects the address (And RAM banks) for the I/O instructions
(All instructions with an "E" OPR)

(*2) For use with 4008/4009

(*3) Converts contents of the accumulator from a one out
of four code to a binary code

(*4) c1:Invert Jump Condition (if c1==1)
c2:Accumulator Equals Zero Condition
c3:Carry Equals One Condition
c4:Test Signal (TST - Pin 10) equals Zero Condition
Interesting thought: the 4004 has no stack, yet it features a jump to subroutine (JMS) instruction. see if you can describe how JMS was implemented, given the absence of the stack. could subroutines be recursive? if not, how many levels of nesting were possible? comment on the absence or presence of a "return register" that might allow only 1 level of nesting.

Excerpts of MCS-40 Data Book (17Mb pdf file)

This excerpt was published in the 1997 version of the Intel MCS-40 data book. It includes specifications for:

4004 - Single Chip 4-Bit P-Channel Microprocessor
4001 - 256 x 8 Mask Programmable ROM and 4 Bit I/O Port
4002 - 320 Bit RAM and 4 Bit Output Port
4003 - 10 Bit Shift Register/Output Expander
4008/4009 - Standard Memory and I/O Interface Set


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Compiled - August 2002